CPSC 448C Project Application Proposal
 
Quality of Service Implementation For A Network Packet Scheduler Using A Weighted Fair Queuing Algorithm 
By Philip Henderson
 
Executive Summary 
The objective of this project is to implement and evaluate the performance of a weighted fair queuing algorithm on an embedded processor.  The embedded processor to be used in this case is the Strong Arm processor, due to its wide use in routers.  This will involve testing a scheduler with voice and video data produced by a network simulator or from real sources. 
 
Statement of Need: 
Providing quality of service guarantees is essential for emerging applications such as voice over IP (VoIP), video over IP, etc.  However, QoS computation adds quite a bit to the per-packet processing
overhead.  QoS computation normally includes scheduling algorithms to compute packet ordering. 
 
Team Members And Roles: 
I will be working on this project on my own to complete the requirements for this course. However, throughout the course of this project, I will be working in conjunction with three other people. They are: 
Dr. Alan Hu  Official CS dept supervisor for my CS 448 project ajh@cs.ubc.ca
Dr. Hussein Alnuweiri Actual supervisor (dept of EECE)  hussein@ece.ubc.ca
Philip Liu Research associate (dept of EECE) phill@ece.ubc.ca
 
Project Activities 
This project will have a research component, an implementation and testing component, and a report writing component.  The project activities listed below will include, but not be limited to the following:
 
- Research (reading research papers) on discrete events set problems such as calendar queuing, and its variants for use on an ARM processor. This will be done to find a fast implementation of a scheduling
algorithm for a priority queue.
- Design and implementation of the selected algorithm.
- Profiling the implementation  (analyzing implementation for speed, time, memory accesses, etc) for the Strong Arm Processor. 
- Porting the WFQ algorithm with the selected priority queue to the Strong Arm Processor and integration with the Intel IXP API. 
- Profiling the WFQ implementation that has been integrated with the selected priority queue. 
- Writing a report summarizing the work completed over the period of the course. 
- During the course, I also plan to meet with Dr. Alnuweiri from time to time to discuss the progress of the project. 
 
Schedule: 11 weeks total 
This project is being completed for the requirements of CPSC 448C –the 6 credit version of this course. A general overview of the activities and dates for completion of those activities is shown below. 
 
Activity Dates Time
Organization of project and proposal writing May 7 – 14 1 week
Research May 14 –28 2 weeks
Implementation and profiling of scheduling algorithm May 28 – June 18 3 weeks
Implementation and profiling of WFQ algorithm June 18 – July 9 3 weeks
Writing of final report  July 9 – July 23 2 weeks
 
The final report is to be handed in at the end of the course on July 23, 2001. This report will include a description of all project activities actually completed, detailed analysis of the algorithms used, along with a summary of the research completed. Along with the report, I will include pseudo code for any source code I have completed for this project.
 
last updated: May 17, 2001 by Philip Henderson (phenderson@Philiphenderson.com)